/**
  ******************************************************************************
  * @file    Libraries/Device/TS32F020D/TS32F020D_LL_Driver/src/ts32f020d_ll_ust.c
  * @author  JUSHENG Application Team
  * @version V1.0.0
  * @date    02-19-2022
  * @brief   This file contains all the UST LL firmware functions.
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; COPYRIGHT 2022 JUSHENG</center></h2>
  *
  *
  *
  ******************************************************************************
  */ 

/* Includes ------------------------------------------------------------------*/
#include "include.h"

/** @addtogroup TS32F020D_StdPeriph_Driver TS32F020D Driver
  * @{
  */
  
/** @defgroup ust_interface_gr UST Driver
  * @ingroup  TS32F020D_StdPeriph_Driver
  * @{
  */

/** @addtogroup UST_LL_Driver UST LL Driver
  * @ingroup  ust_interface_gr
  * @{
  */
  
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/

/** @defgroup UST_LL_Inti_Cfg UST LL Initialization And Configuration
  * @ingroup  UST_LL_Driver
  * @brief    UST LL Initialization And Configuration
  * @{
  */

/**
  * @brief  ust_uart_init
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  p_init: pointer to the init stuct TYPE_LL_UST_INIT
  * @retval None
  */
void ll_ust_uart_init(UST_TypeDef *p_uart, TYPE_LL_UST_UART_INIT *p_init)
{
    TX_ASSERT(((p_uart == UST0)) && (p_init != NULL));

    p_uart->UST_MODE = LL_UST_UART_MODE;
    ll_ust_uart_baudrate_set(p_uart, p_init->baudrate);
    p_uart->UST_CON0 = (p_init->wire_mode_choose ? LL_UST_CON0_UART_WIRE_MODE_EN : 0) |
                       (p_init->uart_interrupt_en ? LL_UST_CON0_UART_DONE_IE : 0);
    p_uart->UST_STA  = ALL_WORD_FF;
}

/**
  * @brief  ust_spi_init
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  p_init: pointer to the init stuct TYPE_LL_UST_INIT
  * @retval None
  */
void ll_ust_spi_init(UST_TypeDef *p_spi, TYPE_LL_UST_SPI_INIT *p_init)
{
    TX_ASSERT(((p_spi == UST0)) && (p_init != NULL));

    p_spi->UST_MODE = LL_UST_SPI_MODE;
    p_spi->UST_CON0 = (p_init->spi_done_ie_en ? LL_UST_CON0_SPI_DONE_IE : 0) |
                      (p_init->spi_lsbf_en ? LL_UST_CON0_SPI_LSBF_EN : 0) |
                      (p_init->spi_tx_rx_choose ? LL_UST_CON0_SPI_TX_EN : 0) |
                      (p_init->spi_cs ? LL_UST_CON0_SPI_CS_SET : 0) |
                      (p_init->spi_sync_en ? LL_UST_CON0_SPI_SYNC_EN : 0) |
                      (p_init->spi_wire_mode ? LL_UST_CON0_SPI_WIRE_MODE_EN : 0) |
                      (LL_UST_CON0_SPI_CPOL_CPHA_SET(p_init->spi_cpol_cpha));
    
    ll_ust_spi_baudrate_set(p_spi, p_init->spi_frequency);
    p_spi->UST_STA  = ALL_WORD_FF;
}

/**
  * @brief  ust_timer_init
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  p_init: pointer to the init stuct TYPE_LL_UST_INIT
  * @retval None
  */
void ll_ust_timer_init(UST_TypeDef *p_timer, TYPE_LL_UST_TIMER_INIT *p_init)
{
    TX_ASSERT(((p_timer == UST0)) && (p_init != NULL));

    p_timer->UST_MODE = LL_UST_TIMER_MODE;
    p_timer->UST_CON0 = (p_init->timer_done_ie_en ? LL_UST_CON0_TIMER_DONE_IE : 0) |
                        (LL_UST_CON0_TIMER_PSC_SET(p_init->timer_psc));
    p_timer->UST_BAUD = LL_UST_BAUD_TIMER_PRD(p_init->timer_period);
    p_timer->UST_STA  = ALL_WORD_FF;
}

/**
  * @brief  ust_timer_pwm_cfg
  * @param  p_timer : pointer to the hardware UST_TypeDef
  * @param  pwm_cfg: pointer to the init stuct TYPE_LL_UST_TIMER_PWM_CFG
  * @retval None
  */
void ll_ust_timer_pwm_cfg(UST_TypeDef *p_timer, TYPE_LL_UST_TIMER_PWM_CFG *pwm_cfg)
{
    TX_ASSERT(((p_timer == UST0)) && (p_timer != NULL));
    TX_ASSERT(p_timer->UST_MODE == LL_UST_TIMER_MODE);

#if 0
    if(pwm_cfg->timer_pwm_led_mode)
    {
        p_timer->UST_CON0 |= (pwm_cfg->timer_pwm_led_mode ? LL_UST_CON0_TIMER_PWM_LED_MODE : 0) |
                             (pwm_cfg->timer_pwm0_pol ? LL_UST_CON0_TIMER_PWM0_POL : 0);
        
        p_timer->UST_BAUD = pwm_cfg->timer_prd;
        
        p_timer->UST_CMP01 = LL_UST_TIMER_CMP0(pwm_cfg->pwm0_duty) |
                             LL_UST_TIMER_CMP1(pwm_cfg->pwm1_duty);
        
        p_timer->UST_CMP23_BUF = LL_UST_PWM_LED_FRAME_SET(pwm_cfg->timer_led_mode_frame_set) |
                                 LL_UST_PWM_LED_BIT_SET(pwm_cfg->timer_led_mode_bit_set);
    }
    else
    {
        p_timer->UST_CON0 &= ~(LL_UST_CON0_TIMER_PWM_LED_MODE);
        
        p_timer->UST_CON0 = p_timer->UST_CON0 & ~(LL_UST_CON0_TIMER_PWM_DAED_ZONE_SET(0xFF));
        p_timer->UST_CON0 |= LL_UST_CON0_TIMER_PWM_DAED_ZONE_SET(pwm_cfg->pwm_dead_zone);

        p_timer->UST_CON0 = p_timer->UST_CON0 & ~(LL_UST_CON0_TIMER_PWM_POL_SET(0xFF));
        p_timer->UST_CON0 |= LL_UST_CON0_TIMER_PWM_POL_SET(pwm_cfg->timer_pwm_pol);

        p_timer->UST_CMP01 = LL_UST_TIMER_CMP0(pwm_cfg->pwm0_duty) |
                             LL_UST_TIMER_CMP1(pwm_cfg->pwm1_duty);
        p_timer->UST_CMP23 = LL_UST_TIMER_CMP2(pwm_cfg->pwm2_duty) |
                             LL_UST_TIMER_CMP3(pwm_cfg->pwm3_duty);
    }
#endif
    p_timer->UST_CON0 &= ~(LL_UST_CON0_TIMER_PWM_LED_MODE);
        
    p_timer->UST_CON0 = p_timer->UST_CON0 & ~(LL_UST_CON0_TIMER_PWM_DAED_ZONE_SET(0xFF));
    p_timer->UST_CON0 |= LL_UST_CON0_TIMER_PWM_DAED_ZONE_SET(pwm_cfg->pwm_dead_zone);

    p_timer->UST_CON0 = p_timer->UST_CON0 & ~(LL_UST_CON0_TIMER_PWM_POL_SET(0xFF));
    p_timer->UST_CON0 |= LL_UST_CON0_TIMER_PWM_POL_SET(pwm_cfg->timer_pwm_pol);

    p_timer->UST_CMP01 = LL_UST_TIMER_CMP0(pwm_cfg->pwm0_duty) |
                           LL_UST_TIMER_CMP1(pwm_cfg->pwm1_duty);
    p_timer->UST_CMP23 = LL_UST_TIMER_CMP2(pwm_cfg->pwm2_duty) |
                          LL_UST_TIMER_CMP3(pwm_cfg->pwm3_duty);
}

/**
  * @brief  ust_timer_pwm_led_mode_cfg
  * @param  p_timer : pointer to the hardware UST_TypeDef
  * @param  pwm_led_cfg: pointer to the init stuct TYPE_LL_UST_TIMER_PWM_LED_MODE_CFG
  * @retval None
  */
void ll_ust_timer_pwm_led_mode_cfg(UST_TypeDef *p_timer, TYPE_LL_UST_TIMER_PWM_LED_MODE_CFG *pwm_led_cfg)
{
    TX_ASSERT(((p_timer == UST0)) && (p_timer != NULL));
    TX_ASSERT(p_timer->UST_MODE == LL_UST_TIMER_MODE);
    
    p_timer->UST_CON0 |= LL_UST_CON0_TIMER_PWM_LED_MODE;

    if(pwm_led_cfg->pwm_led_pol)
        p_timer->UST_CON0 |= LL_UST_CON0_TIMER_PWM0_POL;
    else
        p_timer->UST_CON0 &= ~(LL_UST_CON0_TIMER_PWM0_POL);

    p_timer->UST_CMP01 = LL_UST_TIMER_CMP0(pwm_led_cfg->bit_0_duty) |
                         LL_UST_TIMER_CMP1(pwm_led_cfg->bit_1_duty);

    p_timer->UST_CMP23_BUF = LL_UST_PWM_LED_FRAME_SET(pwm_led_cfg->led_mode_frame) |
                        LL_UST_PWM_LED_BIT_SET(pwm_led_cfg->led_mode_bit);
}

/**
  * @brief  ust_uart_interrupt_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_uart_interrupt_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_UART_DONE_IE;
}

/**
  * @brief  ust_uart_interrupt_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_uart_interrupt_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_UART_DONE_IE;
}

/**
  * @brief  Single/double line mode
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  tx_data: data
  * @retval None
  */
void ll_ust_uart_wire_mode_choose_single(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_UART_WIRE_MODE_EN;
}

/**
  * @brief  Single/double line mode
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  tx_data: data
  * @retval None
  */
void ll_ust_uart_wire_mode_choose_double(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_UART_WIRE_MODE_EN;
}

/**
  * @brief  ust uart irq tx
  * @param  p_uart: The structure pointer of the UST group (UART) is selected.
  * @param  tx_data: tx uart data.
  * @retval result.
  * @note   uart tx done pending need clear in irq interrupt,and tx next data in the uart irq interrupt.
  */
void ll_ust_uart_irq_tx(UST_TypeDef *p_ust, u8 tx_data)
{
//    while(LL_UST_STA_START_PENDING_GET(UST0));
    while(LL_UST_STA_BUFFER_PENDING_GET(UST0));
    p_ust->UST_DATA = tx_data;
//    while(LL_UST_STA_DONE_PENDING_GET(UST0))
//    {
//        LL_UST_STA_DONE_PENDING_CLR(UST0);
//    }
}

/**
  * @brief  ust_uart_tx_data
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  tx_data: data
  * @retval None
  */
void ll_ust_uart_tx_data(UST_TypeDef *p_ust, u8 tx_data)
{
    p_ust->UST_DATA = tx_data;
    while(!LL_UST_STA_DONE_PENDING_GET(p_ust));
    LL_UST_STA_DONE_PENDING_CLR(p_ust);
}

/**
  * @brief  ust_uart_rx_data
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  rx_data: data
  * @retval None
  */
void ll_ust_uart_rx_data(UST_TypeDef *p_ust, u8 *rx_data)
{
//    if(LL_UST_STA_DONE_PENDING_GET(p_ust))
//    {
        //while(!LL_UST_STA_BUFFER_PENDING_GET(p_ust));
        *rx_data = p_ust->UST_DATA;
        LL_UST_STA_DONE_PENDING_CLR(p_ust);
//        return true;
//    }
//    
//    return false;
}

/**
  * @brief  uart baudrate set
  * @param  p_uart: The structure pointer of the UST group is selected.
  * @param  baudrate: uart baudrate.
  * @retval result.
  */
void ll_ust_uart_baudrate_set(UST_TypeDef *p_uart, u32 baudrate)
{
    p_uart->UST_BAUD = LL_UST_BAUD_UART_BAUD((SYS_CLK/baudrate - 1));
}

/**
  * @brief  ust_spi_interrupt_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_interrupt_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_SPI_DONE_IE;
}

/**
  * @brief  ust_spi_interrupt_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_interrupt_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_SPI_DONE_IE;
}

/**
  * @brief  ust_spi_lsbf_choose
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_lsbf_H_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_SPI_LSBF_EN;
}

/**
  * @brief  ust_spi_lsbf_choose
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_lsbf_L_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_SPI_LSBF_EN;
}

/**
  * @brief  ll_ust_spi_cpol_cpha_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_cpol_cpha_set(UST_TypeDef *p_ust, TYPE_ENUM_LL_UST_SPI_MODE spi_cpol_cpha_mode)
{
    p_ust->UST_CON0 &= ~(0x3 << 0) ;
    p_ust->UST_CON0 |= LL_UST_CON0_SPI_CPOL_CPHA_SET(spi_cpol_cpha_mode);
}

/**
  * @brief  ust_spi_choose_tx
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_tx_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_SPI_TX_EN;
}

/**
  * @brief  ust_spi_choose_rx
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_rx_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_SPI_TX_EN;
}

/**
  * @brief  ust_spi_cs_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_cs_high(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_SPI_CS_SET;
}

/**
  * @brief  ust_spi_cs_clr
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_cs_low(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_SPI_CS_SET;
}

/**
  * @brief  ust_spi_sync_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_sync_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_SPI_SYNC_EN;
}

/**
  * @brief  ust_spi_sync_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_sync_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_SPI_SYNC_EN;
}

/**
  * @brief  ust_spi_wire_mode_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_spi_wire_mode_set(UST_TypeDef *p_ust, TYPE_ENUM_LL_UST_SPI_WIRE_MODE wire_mode)
{
    if(wire_mode)
    {
        p_ust->UST_CON0 |= LL_UST_CON0_SPI_WIRE_MODE_EN;
    }
    else
    {
        p_ust->UST_CON0 &= ~LL_UST_CON0_SPI_WIRE_MODE_EN;
    }
}

/**
  * @brief  ust_spi_cpol_cpha_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ust_spi_cpol_cpha_set(UST_TypeDef *p_ust, TYPE_ENUM_LL_UST_SPI_MODE mode)
{
    p_ust->UST_CON0 = LL_UST_CON0_SPI_CPOL_CPHA_SET(mode);
}

/**
  * @brief  ust_spi_tx_data
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  tx_data: data
  * @retval None
  */
void ll_ust_spi_tx_byte(UST_TypeDef *p_ust, u8 tx_data)
{
    ll_ust_spi_tx_enable(p_ust);
    p_ust->UST_DATA = tx_data;
    while(!LL_UST_STA_DONE_PENDING_GET(p_ust));
    while(LL_UST_STA_BUFFER_PENDING_GET(p_ust));
    LL_UST_STA_DONE_PENDING_CLR(p_ust);
}

/**
  * @brief  ust_spi_rx_data
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  rx_data: data
  * @retval None
  */
void ll_ust_spi_rx_byte(UST_TypeDef *p_ust, u8 *rx_data)
{
    ll_ust_spi_rx_enable(p_ust);
    p_ust->UST_DATA = 0x00;
    while(!LL_UST_STA_BUFFER_PENDING_GET(p_ust));
    *rx_data = p_ust->UST_DATA;
    LL_UST_STA_DONE_PENDING_CLR(p_ust);
}

/**
  * @brief  spi baudrate set
  * @param  p_uart: The structure pointer of the UST group is selected.
  * @param  baudrate: uart baudrate.
  * @retval result.
  */
void ll_ust_spi_baudrate_set(UST_TypeDef *p_ust, u32 baudrate)
{
    p_ust->UST_BAUD = LL_UST_BAUD_UART_BAUD(SYS_CLK / (2 * baudrate) + 1);
}

/**
  * @brief  Link layer stop SPI or IIC
  * @param  p_spi: SPI or IIC group address
  * @retval none
  */
void ll_ust_spi_stop(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 = 0x0000;
}

/**
  * @brief  ust_timer_interrupt_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_interrupt_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_DONE_IE;
}

/**
  * @brief  ust_timer_interrupt_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_interrupt_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_TIMER_DONE_IE;
}

/**
  * @brief  ll_ust_timer_psc_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  data : The data of TYPE_ENUM_LL_UST_TIMER_PSC
  * @retval None
  */
void ll_ust_timer_psc_set(UST_TypeDef *p_ust, TYPE_ENUM_LL_UST_TIMER_PSC data)
{
    p_ust->UST_CON0 &= ~(LL_UST_CON0_TIMER_PSC_SET(0x7));
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_PSC_SET(data);
}

/**
  * @brief  TIMER counting cycle control
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  data : overloaded data
  * @retval None
  */
void ll_ust_timer_prd_set(UST_TypeDef *p_ust, u16 data)
{
    p_ust->UST_BAUD &= 0xFFFF0000;
    p_ust->UST_BAUD |= LL_UST_BAUD_TIMER_PRD(data);
}

/**
  * @brief  ust_timer_pwm_dead_zone_write
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm_dead_zone_write(UST_TypeDef *p_ust, u16 data)
{
    p_ust->UST_CON0 &= ~(LL_UST_CON0_TIMER_PWM_DAED_ZONE_SET(0x1F));
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_PWM_DAED_ZONE_SET(data);
}

/**
  * @brief  ll_ust_timer_pwm_led_mode_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm_led_mode_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~(LL_UST_CON0_TIMER_PWM_LED_MODE);
}

/**
  * @brief  ll_ust_timer_pwm_led_mode_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm_led_mode_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~(LL_UST_CON0_TIMER_PWM_LED_MODE);
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_PWM_LED_MODE;
}

/**
  * @brief  ust timer pwm updata hold enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm_updata_hold_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_PWM_UD_HOLD;
}

/**
  * @brief  ust timer pwm updata hold disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm_updata_hold_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~(LL_UST_CON0_TIMER_PWM_UD_HOLD);
}

/**
  * @brief  ll_ust_timer_pwm3_pol_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm3_pol_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_PWM3_POL;
}

/**
  * @brief  ust_timer_pwm3_pol_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm3_pol_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_TIMER_PWM3_POL;
}

/**
  * @brief  ust_timer_pwm2_pol_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm2_pol_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_PWM2_POL;
}

/**
  * @brief  ust_timer_pwm3_pol_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm2_pol_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_TIMER_PWM2_POL;
}

/**
  * @brief  ust_timer_pwm1_pol_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm1_pol_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_PWM1_POL;
}

/**
  * @brief  ust_timer_pwm1_pol_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm1_pol_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_TIMER_PWM1_POL;
}

/**
  * @brief  ust_timer_pwm0_pol_enable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm0_pol_enable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 |= LL_UST_CON0_TIMER_PWM0_POL;
}

/**
  * @brief  ust_timer_pwm0_pol_disable
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_pwm0_pol_disable(UST_TypeDef *p_ust)
{
    p_ust->UST_CON0 &= ~LL_UST_CON0_TIMER_PWM0_POL;
}

/**
  * @brief  ust_timer_prd_buf_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_prd_buf_set(UST_TypeDef *p_ust, u16 value)
{
    p_ust->UST_PRD_BUF &= ~(LL_UST_TIMER_PRD_BUF(0xFFFF));
    p_ust->UST_PRD_BUF |= LL_UST_TIMER_PRD_BUF(value);
}

/**
  * @brief  ust_pwm0_duty_buf_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_pwm0_duty_buf_set(UST_TypeDef *p_ust, u16 value)
{
    p_ust->UST_CMP01_BUF &= ~(LL_UST_TIMER_CMP0(0xFFFF));
    p_ust->UST_CMP01_BUF |= LL_UST_TIMER_CMP0(value);
}

/**
  * @brief  ust_pwm1_duty_buf_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_pwm1_duty_buf_set(UST_TypeDef *p_ust, u16 value)
{
    p_ust->UST_CMP01_BUF &= ~(LL_UST_TIMER_CMP1(0xFFFF));
    p_ust->UST_CMP01_BUF |= LL_UST_TIMER_CMP1(value);
}

/**
  * @brief  ust_pwm2_duty_buf_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_pwm2_duty_buf_set(UST_TypeDef *p_ust, u16 value)
{
    p_ust->UST_CMP23_BUF &= ~(LL_UST_TIMER_CMP2(0xFFFF));
    p_ust->UST_CMP23_BUF |= LL_UST_TIMER_CMP2(value);
}

/**
  * @brief  ust_pwm3_duty_buf_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_pwm3_duty_buf_set(UST_TypeDef *p_ust, u16 value)
{
    p_ust->UST_CMP23_BUF &= ~(LL_UST_TIMER_CMP3(0xFFFF));
    p_ust->UST_CMP23_BUF |= LL_UST_TIMER_CMP3(value);
}

/**
  * @brief  ust_timer_pwm_bit_stream_buf_write
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ust_timer_pwm_bit_stream_buf_write(UST_TypeDef *p_ust, u32 value)
{
    p_ust->UST_CMP23 &= ~(LL_UST_PWM_BIT_STREAM_BUF(0xFFFFFFFF));
    p_ust->UST_CMP23 |= LL_UST_PWM_BIT_STREAM_BUF(value);
}

/**
  * @brief  ust_timer_pwm_led_frame_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ust_timer_pwm_led_frame_set(UST_TypeDef *p_ust, u8 value)
{
    p_ust->UST_CMP23_BUF &= ~(LL_UST_PWM_LED_FRAME_SET(0x7));
    p_ust->UST_CMP23_BUF |= LL_UST_PWM_LED_FRAME_SET(value);
}

/**
  * @brief  ust_timer_pwm_led_bit_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ust_timer_pwm_led_bit_set(UST_TypeDef *p_ust, u8 value)
{
    p_ust->UST_CMP23_BUF &= ~(LL_UST_PWM_LED_BIT_SET(0x1F));
    p_ust->UST_CMP23_BUF |= LL_UST_PWM_LED_BIT_SET(value);
}

/**
  * @brief  ust_timer_pwm_bit_stream_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ust_timer_pwm_led_bit_stream_set(UST_TypeDef *p_ust, u32 value)
{
    p_ust->UST_CMP01_BUF = value;
}

/**
  * @brief  ust_timer_pwm_bit_stream_buf_set
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ust_timer_pwm_led_bit_stream_buf_set(UST_TypeDef *p_ust, u32 value)
{
    p_ust->UST_CMP23 = value;
}

/**
  * @brief  Write begins when idle,Writing stopped while working.
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_start(UST_TypeDef *p_ust)
{
    if(!LL_UST_STA_START_PENDING_GET(p_ust))
        p_ust->UST_CNT = 0xFFFF;
}

/**
  * @brief  Writing stopped while working.
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @retval None
  */
void ll_ust_timer_stop(UST_TypeDef *p_ust)
{
    if(LL_UST_STA_START_PENDING_GET(p_ust))
        p_ust->UST_CNT = 0xFFFF;
}

/**
  * @brief  ust uart mode config.
  * @param  p_ust : pointer to the hardware UST_TypeDef
  * @param  baudrate : uart baud rate
  * @retval None
  */
void ll_ust_uart_config(UST_TypeDef *p_ust, u32 baudrate)
{
    p_ust->UST_MODE = LL_UST_UART_MODE;
    p_ust->UST_BAUD = LL_UST_BAUD_UART_BAUD((SYS_CLK/baudrate - 1));
    p_ust->UST_STA  = ALL_WORD_FF;
}


/**
  * @}
  */

/**
  * @}
  */

/**
  * @}
  */

/*************************** (C) COPYRIGHT 2022 JUSHENG ***** END OF FILE *****/
